[CI] Format code according to conventions (#25827)

Format code according to conventions

11 files changed, 26 insertions, 27 deletions

diff --git a/platforms/chibios/drivers/analog.c b/platforms/chibios/drivers/analog.c
index a916cc9a1d..93005c2555 100644
--- a/platforms/chibios/drivers/analog.c
+++ b/platforms/chibios/drivers/analog.c
@@ -145,7 +145,7 @@ static ADCConversionGroup adcConversionGroup = {
     .smpr  = ADC_SAMPLING_RATE,
 #elif defined(USE_ADCV2)
 #    if !defined(STM32F1XX) && !defined(GD32VF103) && !defined(WB32F3G71xx) && !defined(WB32FQ95xx) && !defined(AT32F415)
-    .cr2  = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without...
+    .cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without...
 #    endif
 #    if defined(AT32F415)
     .spt2 = ADC_SPT2_CSPT_AN0(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN1(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN2(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN3(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN4(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN5(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN6(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN7(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN8(ADC_SAMPLING_RATE) | ADC_SPT2_CSPT_AN9(ADC_SAMPLING_RATE),
diff --git a/platforms/chibios/drivers/audio_dac_basic.c b/platforms/chibios/drivers/audio_dac_basic.c
index 99b938e610..053584ec87 100644
--- a/platforms/chibios/drivers/audio_dac_basic.c
+++ b/platforms/chibios/drivers/audio_dac_basic.c
@@ -77,9 +77,9 @@ GPTConfig gpt7cfg1 = {.frequency = AUDIO_DAC_SAMPLE_RATE,
 
 static void gpt_audio_state_cb(GPTDriver *gptp);
 GPTConfig   gptStateUpdateCfg = {.frequency = 10,
-                               .callback  = gpt_audio_state_cb,
-                               .cr2       = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event.    */
-                               .dier      = 0U};
+                                 .callback  = gpt_audio_state_cb,
+                                 .cr2       = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event.    */
+                                 .dier      = 0U};
 
 static const DACConfig dac_conf_ch1 = {.init = AUDIO_DAC_OFF_VALUE, .datamode = DAC_DHRM_12BIT_RIGHT};
 static const DACConfig dac_conf_ch2 = {.init = AUDIO_DAC_OFF_VALUE, .datamode = DAC_DHRM_12BIT_RIGHT};
diff --git a/platforms/chibios/drivers/audio_pwm_software.c b/platforms/chibios/drivers/audio_pwm_software.c
index f48323900b..015bdbee1a 100644
--- a/platforms/chibios/drivers/audio_pwm_software.c
+++ b/platforms/chibios/drivers/audio_pwm_software.c
@@ -63,8 +63,8 @@ void         channel_1_set_frequency(float freq) {
     pwmChangePeriod(&AUDIO_PWM_DRIVER, period);
 
     pwmEnableChannel(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1,
-                     // adjust the duty-cycle so that the output is for 'note_timbre' duration HIGH
-                     PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100));
+                             // adjust the duty-cycle so that the output is for 'note_timbre' duration HIGH
+                             PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100));
 }
 
 float channel_1_get_frequency(void) {
@@ -117,8 +117,8 @@ GPTConfig   gptCFG = {
        and the .interval counts from 64 downwards - audio_update_state is
        called just often enough to not miss anything
     */
-    .frequency = 60 * 64,
-    .callback  = gpt_callback,
+      .frequency = 60 * 64,
+      .callback  = gpt_callback,
 };
 
 void audio_driver_initialize_impl(void) {
diff --git a/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.c b/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.c
index 9cf956b2f7..9edbc1d2ed 100644
--- a/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.c
+++ b/platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.c
@@ -482,7 +482,7 @@ uint32_t eeprom_read_dword(const uint32_t *addr) {
 
 void eeprom_read_block(void *buf, const void *addr, size_t len) {
     const uint8_t *p    = (const uint8_t *)addr;
-    uint8_t *      dest = (uint8_t *)buf;
+    uint8_t       *dest = (uint8_t *)buf;
     while (len--) {
         *dest++ = eeprom_read_byte(p++);
     }
@@ -507,7 +507,7 @@ void eeprom_write_dword(uint32_t *addr, uint32_t value) {
 }
 
 void eeprom_write_block(const void *buf, void *addr, size_t len) {
-    uint8_t *      p   = (uint8_t *)addr;
+    uint8_t       *p   = (uint8_t *)addr;
     const uint8_t *src = (const uint8_t *)buf;
     while (len--) {
         eeprom_write_byte(p++, *src++);
@@ -538,7 +538,7 @@ void eeprom_update_dword(uint32_t *addr, uint32_t value) {
 }
 
 void eeprom_update_block(const void *buf, void *addr, size_t len) {
-    uint8_t *      p   = (uint8_t *)addr;
+    uint8_t       *p   = (uint8_t *)addr;
     const uint8_t *src = (const uint8_t *)buf;
     while (len--) {
         eeprom_write_byte(p++, *src++);
diff --git a/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c b/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c
index 9857ac046b..cf6b85fd12 100644
--- a/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c
+++ b/platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c
@@ -577,7 +577,7 @@ void eeprom_driver_erase(void) {
 
 void eeprom_read_block(void *buf, const void *addr, size_t len) {
     const uint8_t *src  = (const uint8_t *)addr;
-    uint8_t *      dest = (uint8_t *)buf;
+    uint8_t       *dest = (uint8_t *)buf;
 
     /* Check word alignment */
     if (len && (uintptr_t)src % 2) {
@@ -606,7 +606,7 @@ void eeprom_read_block(void *buf, const void *addr, size_t len) {
 }
 
 void eeprom_write_block(const void *buf, void *addr, size_t len) {
-    uint8_t *      dest = (uint8_t *)addr;
+    uint8_t       *dest = (uint8_t *)addr;
     const uint8_t *src  = (const uint8_t *)buf;
 
     /* Check word alignment */
diff --git a/platforms/chibios/drivers/flash/legacy_flash_ops.c b/platforms/chibios/drivers/flash/legacy_flash_ops.c
index fe5ad64764..ca3fbdd740 100644
--- a/platforms/chibios/drivers/flash/legacy_flash_ops.c
+++ b/platforms/chibios/drivers/flash/legacy_flash_ops.c
@@ -171,7 +171,7 @@ FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) {
             FLASH->CR |= FLASH_CR_PSIZE_0;
 #endif
             FLASH->CR |= FLASH_CR_PG;
-            *(__IO uint16_t*)Address = Data;
+            *(__IO uint16_t *)Address = Data;
             /* Wait for last operation to be completed */
             status = FLASH_WaitForLastOperation(ProgramTimeout);
             if (status != FLASH_TIMEOUT) {
diff --git a/platforms/chibios/drivers/serial_usart.c b/platforms/chibios/drivers/serial_usart.c
index becf3afbce..0d3d01042f 100644
--- a/platforms/chibios/drivers/serial_usart.c
+++ b/platforms/chibios/drivers/serial_usart.c
@@ -27,12 +27,12 @@ static QMKSerialConfig serial_config = {
 #    else
     .baud = (SERIAL_USART_SPEED),
 #    endif
-    .cr1   = (SERIAL_USART_CR1),
-    .cr2   = (SERIAL_USART_CR2),
+    .cr1 = (SERIAL_USART_CR1),
+    .cr2 = (SERIAL_USART_CR2),
 #    if !defined(SERIAL_USART_FULL_DUPLEX)
-    .cr3   = ((SERIAL_USART_CR3) | USART_CR3_HDSEL) /* activate half-duplex mode */
+    .cr3 = ((SERIAL_USART_CR3) | USART_CR3_HDSEL) /* activate half-duplex mode */
 #    else
-    .cr3  = (SERIAL_USART_CR3)
+    .cr3 = (SERIAL_USART_CR3)
 #    endif
 };
 #elif defined(MCU_RP) /* Raspberry Pi MCUs */
diff --git a/platforms/chibios/drivers/uart_sio.c b/platforms/chibios/drivers/uart_sio.c
index fc12f0abed..dcf0cef20f 100644
--- a/platforms/chibios/drivers/uart_sio.c
+++ b/platforms/chibios/drivers/uart_sio.c
@@ -82,13 +82,13 @@ static SIOConfig sioConfig = {
 };
 #else
 static SIOConfig sioConfig = {
-    .baud  = SIO_DEFAULT_BITRATE,
+    .baud = SIO_DEFAULT_BITRATE,
 #    if defined(MCU_STM32) && defined(USE_USARTV3)
     .presc = USART_PRESC1,
 #    endif
-    .cr1   = UART_CR1,
-    .cr2   = UART_CR2,
-    .cr3   = UART_CR3,
+    .cr1 = UART_CR1,
+    .cr2 = UART_CR2,
+    .cr3 = UART_CR3,
 };
 #endif
 
diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c
index fec4646a5b..2328ea0674 100644
--- a/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c
+++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_efl.c
@@ -20,7 +20,7 @@ static flash_sector_t first_sector = UINT16_MAX;
 #endif // WEAR_LEVELING_EFL_OMIT_LAST_SECTOR_COUNT
 
 static flash_sector_t sector_count = UINT16_MAX;
-static BaseFlash *    flash;
+static BaseFlash     *flash;
 static bool           flash_erased_is_one;
 static volatile bool  is_issuing_read    = false;
 static volatile bool  ecc_error_occurred = false;
diff --git a/platforms/chibios/drivers/ws2812_pwm.c b/platforms/chibios/drivers/ws2812_pwm.c
index 50927b849a..0fc20b3f27 100644
--- a/platforms/chibios/drivers/ws2812_pwm.c
+++ b/platforms/chibios/drivers/ws2812_pwm.c
@@ -310,7 +310,7 @@ void ws2812_init(void) {
     palSetLineMode(WS2812_DI_PIN, WS2812_OUTPUT_MODE);
 
     // PWM Configuration
-    //#pragma GCC diagnostic ignored "-Woverride-init"  // Turn off override-init warning for this struct. We use the overriding ability to set a "default" channel config
+    // #pragma GCC diagnostic ignored "-Woverride-init"  // Turn off override-init warning for this struct. We use the overriding ability to set a "default" channel config
     static const PWMConfig ws2812_pwm_config = {
         .frequency = WS2812_PWM_TICK_FREQUENCY,
         .period    = WS2812_PWM_PERIOD, // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben
@@ -328,7 +328,7 @@ void ws2812_init(void) {
         .dier = TIM_DIER_UDE, // DMA on update event for next period
 #endif
     };
-    //#pragma GCC diagnostic pop  // Restore command-line warning options
+    // #pragma GCC diagnostic pop  // Restore command-line warning options
 
     // Configure DMA
     // dmaInit(); // Joe added this
diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c
index d1792b871b..4ae97aa1c9 100644
--- a/platforms/chibios/drivers/ws2812_spi.c
+++ b/platforms/chibios/drivers/ws2812_spi.c
@@ -188,8 +188,7 @@ void ws2812_init(void) {
         0,
         WS2812_SPI_DIVISOR
 #    else
-        WS2812_SPI_DIVISOR_CR1_BR_X,
-        0
+        WS2812_SPI_DIVISOR_CR1_BR_X, 0
 #    endif
 #else
     // HAL_SPI_V2